Behavioral model of half-bridge driver integrated circuit
Simscape / Electrical / Semiconductors & Converters

The Half-Bridge Driver block provides an abstracted representation of an integrated circuit for driving MOSFET and IGBT half-bridges. The block models input hysteresis, propagation delay, and turn-on/turn-off dynamics. Unless modeling a gate driver circuit explicitly, always use this block or the Gate Driver block to set gate-source voltage on a MOSFET block or gate-emitter voltage on an IGBT block. Do not connect a controlled voltage source directly to a semiconductor gate, because this omits the gate driver output impedance that determines switching dynamics.
The Half-Bridge Driver block has two modeling variants, accessible by right-clicking the block in your block diagram and then selecting the appropriate option from the context menu, under Simscape > Block choices:
PS input — The driver output state is controlled by a physical signal input u. Use this variant if all of your controller, including PWM waveform generation, is determined by Simulink® blocks. This modeling variant is the default.
Electrical input ports — The driver output state is controlled by two electrical input connections, PWM and REF. Use this variant if your model has upstream analog components, such as the Controlled PWM Voltage source.
The first pair of output electrical ports, HO and HS, behave in the same way as the G and S ports of the Gate Driver block. Connect these ports to the high-side MOSFET or IGBT of the half-bridge. The second pair of ports, LO and LS, connect to the low-side MOSFET or IGBT of the half-bridge. They behave in a similar way, except that their logic is inverted with respect to that of the high side.
The diagram shows the timing properties for the half-bridge driver, where:
tpLH is low-side propagation delay when the input logic goes from 0 to 1.
tdLH is high-side dead time when the input logic goes from 0 to 1.
tpHL is high-side propagation delay when the input logic goes from 1 to 0.
tdHL is low-side dead time when the input logic goes from 1 to 0.

You can insert a fault into one or both of the outputs at a specified simulation time. The fault options are:
Fail input fixed at logic 0
Fail input fixed at logic 1
Fail high side off
Fail high side on
Fail low side off
Fail low side on
Fail high and low sides off
Fail high and low sides on
Controlled PWM Voltage | Gate Driver | N-Channel IGBT | N-Channel MOSFET | P-Channel MOSFET