How do I speed up Link for ModelSim simulation ?

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I am using Link for Modelsim simulation time tool feature in the Simulink environment on a good size VHDL block. When I run this in the Simulink environment (at 1fS for5uS), the time is unacceptably longer than running this standalone in the ModelSim environment.
Are there any options or tricks to speed up simulation time or is this just a limitation of the environment?

Accepted Answer

MathWorks Support Team
MathWorks Support Team on 27 Jun 2009
Many factors impact performance of simulation and it is very difficult to generalize performance profiles.
One can baseline the performance numbers by timing the execution of the HDL and the Simulink model separately and adding them together; you may not expect better performance than that.
(Please make sure that the separate simulations are representative; Running an HDL-only sim with unrealistic input stimulus, could be much faster than when proper input stimulus is provided.)
There is certainly overhead in the co-simulation, general experience has been that the HDL simulation is the bottleneck in the performance.
Some ideas to analyze/improve performance are:
  • If you are using NFS or other remote filesystems, how fast is the file system?
  • If you are using separate machines for Simulink and ModelSim, how fast is the
network?
  • If you are using the same machine, are they using shared pipes instead of
sockets?
  • If you are using the same machine, are the Simulink and HDL processes large
enough to cause swaps to disk?
  • Are you using optimal (i.e. as large as possible) Simulink sample rates on the Cosim block? For example, if you set the output sample rate to 1 but only use every 10th sample, you could make the rate 10 and reduce the traffic between Simulink and ModelSim. Another example is to place a very fast clock as an input to the cosim block, but have none of the other inputs need such a fast rate. In that case, the clock should be generated in HDL or via the Cosim block Clocks or Tcl tab.
  • Related to the previous one, if you have the Communications blockset, have you considered using Framed signals which reduce the number of Simulink/HDL interactions?
  • Are you compiling/elaborating the HDL using the Vopt flow?
  • Are you using the Simulink Accelerator?

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