How to integrate XilinxBlackBox in an HDL-Coder ISE Project ?

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Hey there
I started a project using HDL Coder. As a few parts of my algorithms are not feasible with the HDL-Coder library, I have to use Xilinx' System Generator for those particular parts of the algorithm.
For the simulation my algorithm works now, using both the System Generator and HDL-Coder library. The translation in VHDL succeeded as well for both tools. The configuration can be looked up in the attached project. I did take care of the following in particular:
The signal names for HDL-Coder fit to the signal names in System Generator (ce, clk, ...). The timings are the same.
Both System Generator and HDL-Coder create ISE-projects. As the major part of my project is translated by the HDL-Coder I use the ISE-Project generated by HDL-Coder and then add the sources generated by the System Generator.
Now my question: no matter which sources I add (<filename>_cw.vhd, filename_cw.xise, ...) int the ISE environment, ISE is not able to put the project together nicely. I always have either sources outside of my project or (as I will explain neatly in the following section) the project reports some errors, I don't understand in this context.
When I add the filename_cw.xise (for the project it is: ngc_netlist/systgenenerator_cw.xise), I get the error message when synthesizing: "structural is not an architecture body for systgenenerator_cw in library work."
This is because ISE does not know the architectures "structural" yet, as it does not include the appropriate source when adding ngc_netlist/systgenenerator_cw.xise.
I tried some time now to find the right combination of files I need to add to the ISE-Project, but I have failed so far.
Anyone can help me putting this project together? :)
thanks in advance pascal
you can download the project here: http://www.datafilehost.com/download-3b13969f.html

Answers (2)

Tim McBrayer
Tim McBrayer on 12 Mar 2012
The difficulties that you are encountering have been addressed in the latest version of HDL Coder. HDL Coder 3.0, released with R2012a, contains explicit support for directly instantiating a Xilinx System Generator subsystem inside a larger Simulink model.
  1 Comment
Pascal
Pascal on 16 Mar 2012
We first had to solve some problems with the license with our administrators :) Now I'm trying if it works. Will post whether successful or not. Thanks for your help

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Pascal
Pascal on 19 Mar 2012
Tim McBrayer
You were right, thanks! With Matlab 2012a and HDL Coder 3.0 it works.
Thanks again Pascal

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