Code generation for C283X: how to configure and use XINTF?

2 views (last 30 days)
Hello, everyone.
I'm generating code from Simulink for a F28335 DSP based custom board. The XINTF external interface is used to interface peripherals.
I have the drivers of the external peripheral in C code, and I have successfully integrated Generated Code with my lagecy C code by Lagecy Tool. But the final executable file(.out) could not run my drivers to interact with the external peripheral. After debugging, the initial functions(in "initial_board()") for XINTF registers does not allow my drivers running correctly. But I don't know how to modify the Configuration in Simulink environment so that the XINTF registers could be initialized as my expectation.
So my question is how to configure XINTF for F28335 chip in the Simulink environment rather than modifying the generated code directly.
Regards, Niu Ruigen
The generated codes for the initialization of XINTF register are as follows:
...
33 /* Make sure write buffer is empty before configuring buffering depth*/
34 while (XintfRegs.XINTCNF2.bit.WLEVEL != 0) ;/* poll the WLEVEL bit*/
35 XintfRegs.XINTCNF2.bit.WRBUFF = 0; /* No write buffering*/
36
37 /* Example: Assume Zone 7 is slow, so add additional BCYC cycles whenever
38 * switching from Zone 7 to another Zone. This will help avoid bus contention.
39 */
40 XintfRegs.XBANK.bit.BCYC = 3; /* Add 7 cycles*/
41 XintfRegs.XBANK.bit.BANK = 3; /* select zone 7*/
42
43 /* Zone 0 Configuration */
44 /*
45 XintfRegs.XTIMING0.bit.X2TIMING = 0; // Timing scale factor = 1
46 XintfRegs.XTIMING0.bit.XSIZE = 3; // Always write as 11b
47 XintfRegs.XTIMING0.bit.READYMODE = 1; // XREADY is asynchronous
48 XintfRegs.XTIMING0.bit.USEREADY = 0; // Disable XREADY
49 XintfRegs.XTIMING0.bit.XRDLEAD = 1; // Read lead time
50 XintfRegs.XTIMING0.bit.XRDACTIVE = 2; // Read active time
51 XintfRegs.XTIMING0.bit.XRDTRAIL = 1; // Read trail time
52 XintfRegs.XTIMING0.bit.XWRLEAD = 1; // Write lead time
53 XintfRegs.XTIMING0.bit.XWRACTIVE = 2; // Write active time
54 XintfRegs.XTIMING0.bit.XWRTRAIL = 1; // Write trail time
55 */
56 XintfRegs.XTIMING0.all = (XintfRegs.XTIMING0.all & ~0x43FFFF) | 0x394A9;
57
58 /* Zone 6 Configuration */
59 /*
60 XintfRegs.XTIMING6.bit.X2TIMING = 0; // Timing scale factor = 1
61 XintfRegs.XTIMING6.bit.XSIZE = 3; // Always write as 11b
62 XintfRegs.XTIMING6.bit.READYMODE = 1; // XREADY is asynchronous
63 XintfRegs.XTIMING6.bit.USEREADY = 0; // Disable XREADY
64 XintfRegs.XTIMING6.bit.XRDLEAD = 1; // Read lead time
65 XintfRegs.XTIMING6.bit.XRDACTIVE = 2; // Read active time
66 XintfRegs.XTIMING6.bit.XRDTRAIL = 1; // Read trail time
67 XintfRegs.XTIMING6.bit.XWRLEAD = 1; // Write lead time
68 XintfRegs.XTIMING6.bit.XWRACTIVE = 2; // Write active time
69 XintfRegs.XTIMING6.bit.XWRTRAIL = 1; // Write trail time
70 */
71 XintfRegs.XTIMING6.all = (XintfRegs.XTIMING6.all & ~0x43FFFF) | 0x394A9;
72
73 /* Zone 7 Configuration */
74 /*
75 XintfRegs.XTIMING7.bit.X2TIMING = 0; // Timing scale factor = 1
76 XintfRegs.XTIMING7.bit.XSIZE = 3; // Always write as 11b
77 XintfRegs.XTIMING7.bit.READYMODE = 1; // XREADY is asynchronous
78 XintfRegs.XTIMING7.bit.USEREADY = 0; // Disable XREADY
79 XintfRegs.XTIMING7.bit.XRDLEAD = 1; // Read lead time
80 XintfRegs.XTIMING7.bit.XRDACTIVE = 2; // Read active time
81 XintfRegs.XTIMING7.bit.XRDTRAIL = 1; // Read trail time
82 XintfRegs.XTIMING7.bit.XWRLEAD = 1; // Write lead time
83 XintfRegs.XTIMING7.bit.XWRACTIVE = 2; // Write active time
84 XintfRegs.XTIMING7.bit.XWRTRAIL = 1; // Write trail time
85 */
86 XintfRegs.XTIMING7.all = (XintfRegs.XTIMING7.all & ~0x43FFFF) | 0x394A9;
87 EDIS;
...

Answers (0)

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!