question about HDL Coder

Hello, I have a question about the HDL coder. I noticed that the code generated depend on the test bench. Is it normal? Thanks. Sara.

Answer 1

[Tim McBrayer]

The short answer is "yes". This is normal, expected, and desired.

I assume that by 'test bench' you are referring to the portion of the design outside the portion of the design being converted to HDL code. For Simulink, this is the model outside the DUT subsystem. For MATLAB, this is the testbench file supplied.

In either a MATLAB or a Simulink design, the data types may be supplied by the modeled test bench. For a simple case, consider the identical design, with one copy fed with int32 inputs and the other fed by int8 inputs. You would expect the the int 8 design to have, for example, 8-bit x 8-bit = 16 bit multipliers, while the design with larger inputs requires 32x32 = 64 bit multipliers.

With a MATLAB design, the test bench is also used during fixed point conversion to determine the fixed point data types to be used internally. If one test bench has inputs that range only from e.g. 1 to 7, and a second test bench has inputs that range from -1023 to +1023, the generated code will be quite different, as the data path needs to be 11 bits wide instead of 3.

[SARA]

Thanks for your response, but is there an option to don't do it.

Answer 2

[Bharath Venkataraman]

I assume that you are talking about the generation of the testbench itself?

In Simulink, there is an option under Configuration Parameters (Ctrl+E) to disable generation of the testbench under HDL Code Generation - Test Bench (the option is HDL test bench).

In MATLAB, the testbench is generated in the HDL Verification step, so running till the HDL Code Generation step will lead to just the HDL code for the design.